<?xml version="1.0" encoding="UTF-8"?>
<feed xmlns="http://www.w3.org/2005/Atom" xmlns:dc="http://purl.org/dc/elements/1.1/">
<title>Volumen 01 | Número 01</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/370" rel="alternate"/>
<subtitle/>
<id>http://sedici.unlp.edu.ar:80/handle/10915/370</id>
<updated>2026-08-15T21:29:28Z</updated>
<dc:date>2026-08-15T21:29:28Z</dc:date>
<entry>
<title>John G. Proakis and Dimitris G. Manolakis, &lt;i&gt;Digital signal processing. Principles, algorithms, and aplications&lt;/i&gt;: Third edition, 1996, Prentice Hall, New Jersey, USA</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9384" rel="alternate"/>
<author>
<name>Bria, Oscar N.</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9384</id>
<updated>2019-06-15T04:04:48Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Revision
Journal of Computer Science &amp; Technology; vol. 1, no. 1
This book presents the fundamentals of discrete-time signals, systems, algorithms and applications for students in electrical engineering or computer science. It covers both time-domain and frequency- domain methods for the analysis of linear, discrete-time systems.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>This book presents the fundamentals of discrete-time signals, systems, algorithms and applications for students in electrical engineering or computer science. It covers both time-domain and frequency- domain methods for the analysis of linear, discrete-time systems.</dc:description>
</entry>
<entry>
<title>&lt;i&gt;Genetic algorithms + Data structure = Evolution programs&lt;/i&gt;, Zbigniew Michalewicz: Springer Verlag, third edition</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9383" rel="alternate"/>
<author>
<name>Gallard, Raúl Hector</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9383</id>
<updated>2019-06-15T04:04:47Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Revision
Journal of Computer Science &amp; Technology; vol. 1, no. 1
El Profesor Michalewicz ofrece, en su libro, una motivante introducción al tema abarcando cada uno de los enfoques evolutivos aunque con preferencia hacia los algoritmos genéticos y sus extensiones: los programas evolutivos.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>El Profesor Michalewicz ofrece, en su libro, una motivante introducción al tema abarcando cada uno de los enfoques evolutivos aunque con preferencia hacia los algoritmos genéticos y sus extensiones: los programas evolutivos.</dc:description>
</entry>
<entry>
<title>&lt;i&gt;Computer architecture, design and performance&lt;/i&gt; - Barry Wilkinson: Prentice Hall, second edition (463 páginas)</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9382" rel="alternate"/>
<author>
<name>Gallard, Raúl Hector</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9382</id>
<updated>2019-06-15T04:04:45Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Revision
Journal of Computer Science &amp; Technology; vol. 1, no. 1
El libro está orientado a las ténicas de diseño para mejorar la performance de sistemas de computación y especialmente hacia aquellas técnicas que involucren paralelismo.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>El libro está orientado a las ténicas de diseño para mejorar la performance de sistemas de computación y especialmente hacia aquellas técnicas que involucren paralelismo.</dc:description>
</entry>
<entry>
<title>Multiplexing real time video services</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9381" rel="alternate"/>
<author>
<name>Simón, María</name>
</author>
<author>
<name>Pechiar, Juan</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9381</id>
<updated>2019-06-15T04:04:45Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Articulo
Journal of Computer Science &amp; Technology; vol. 1, no. 1
Statistical Bit Rate (SBR) transfer capability is considered a good option for supporting Variable Bit Rate (VBR) services. However, its study is somewhat in lag compared with Deterministic Bit Rate (DBR) or Available Bit Rate (ABR) capabilities. The definition of a general Call Acceptance Control (CAC) function is difficult to state for SBR. We present some results regarding the multiplexing of real time data streams, mainly from interactive video services, wich ara naturally VBR an therefore candidates to use the SBR capability. It is shown that image quality is improved by using SBR instead of DBR. The coder design does not become more complicated. In fact, it remains the same. We propose a statistical model for the traffic generated by such video sources. The delays introduced by a switch are studied following two approaches. Exact bounds are found for a worst ase situation, indicating a very low statistical gain. However, simulations show that these bounds are too pessimistic since the worst case very rarely occurs. A very high mean load can be reached with acceptable delays. Indeed, the statistical gain is found to be significant The CAC for this kind of service may be simple because, even assuming pessimistic figures, the burstiness for a real-time video data stream appears to be low.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>Statistical Bit Rate (SBR) transfer capability is considered a good option for supporting Variable Bit Rate (VBR) services. However, its study is somewhat in lag compared with Deterministic Bit Rate (DBR) or Available Bit Rate (ABR) capabilities. The definition of a general Call Acceptance Control (CAC) function is difficult to state for SBR. We present some results regarding the multiplexing of real time data streams, mainly from interactive video services, wich ara naturally VBR an therefore candidates to use the SBR capability. It is shown that image quality is improved by using SBR instead of DBR. The coder design does not become more complicated. In fact, it remains the same. We propose a statistical model for the traffic generated by such video sources. The delays introduced by a switch are studied following two approaches. Exact bounds are found for a worst ase situation, indicating a very low statistical gain. However, simulations show that these bounds are too pessimistic since the worst case very rarely occurs. A very high mean load can be reached with acceptable delays. Indeed, the statistical gain is found to be significant The CAC for this kind of service may be simple because, even assuming pessimistic figures, the burstiness for a real-time video data stream appears to be low.</dc:description>
</entry>
<entry>
<title>Alternative strategies for asynchronous migration-controlled schemes in parallel genetic algorithm</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9380" rel="alternate"/>
<author>
<name>Ochoa, Claudio</name>
</author>
<author>
<name>Gallard, Raúl Hector</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9380</id>
<updated>2019-06-15T04:04:43Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Articulo
Journal of Computer Science &amp; Technology; vol. 1, no. 1
Migration of individuals allows a fruitful interaction between subpopulations in the island model, a well known distributed approach for evolutionary computing, where separate subpopulations evolve in parallel. This model is well suited for a distributed environment running a Single Program Multiple Data (SPMD) scheme. Here, the same Genetic Algorithm (GA) is replicated in many processors and attempting better convergence, through an expected improvement on genetic diversity, selected individuals are exchanged periodically. For exchanging, an individual is selected from a source subpopulation and then exported towards a target subpopulation. Usually, the imported string is accepted on arrival and then inserted into the target subpopulation. Our earlier experiments on controlled migration showed an improvement on results when contrasted against those obtained by conventional migration approaches. This paper describes extended implementations of alternative strategies to oversee migration in asynchronous schemes for an island model and enlarges a previous work on three processors with a set of softer testing functions [9]. All of them try to decrease the risk of premature convergence. A first strategy attempts to prevent unbalanced p ropagation of genotypes by applying an acceptance threshold parameter to each incoming string. A second one permits independent evolution of subpopulations and acts only when a possible stagnation is detected. In such condition an attempt to evade falling towards a local optimum is done by inserting an expected d issimilar individual to improve genetic diversity. A third alternative strategy combines both previous mentioned strategies. The results presented are those obtained on the functions that showed to be more difficult for the island model using a replication of a simple GA. A description of the corresponding system architecture supporting the PGA implementation is described and results for the parallel distributed approach among 3, 6 and 12 processors is discussed.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>Migration of individuals allows a fruitful interaction between subpopulations in the island model, a well known distributed approach for evolutionary computing, where separate subpopulations evolve in parallel. This model is well suited for a distributed environment running a Single Program Multiple Data (SPMD) scheme. Here, the same Genetic Algorithm (GA) is replicated in many processors and attempting better convergence, through an expected improvement on genetic diversity, selected individuals are exchanged periodically. For exchanging, an individual is selected from a source subpopulation and then exported towards a target subpopulation. Usually, the imported string is accepted on arrival and then inserted into the target subpopulation. Our earlier experiments on controlled migration showed an improvement on results when contrasted against those obtained by conventional migration approaches. This paper describes extended implementations of alternative strategies to oversee migration in asynchronous schemes for an island model and enlarges a previous work on three processors with a set of softer testing functions [9]. All of them try to decrease the risk of premature convergence. A first strategy attempts to prevent unbalanced p ropagation of genotypes by applying an acceptance threshold parameter to each incoming string. A second one permits independent evolution of subpopulations and acts only when a possible stagnation is detected. In such condition an attempt to evade falling towards a local optimum is done by inserting an expected d issimilar individual to improve genetic diversity. A third alternative strategy combines both previous mentioned strategies. The results presented are those obtained on the functions that showed to be more difficult for the island model using a replication of a simple GA. A description of the corresponding system architecture supporting the PGA implementation is described and results for the parallel distributed approach among 3, 6 and 12 processors is discussed.</dc:description>
</entry>
<entry>
<title>Parallel recognition and classification of objects</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9379" rel="alternate"/>
<author>
<name>Felice, Rodrigo</name>
</author>
<author>
<name>Ruscitti, Fernando</name>
</author>
<author>
<name>Naiouf, Marcelo</name>
</author>
<author>
<name>De Giusti, Armando Eduardo</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9379</id>
<updated>2019-06-15T04:04:39Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Articulo
Journal of Computer Science &amp; Technology; vol. 1, no. 1
The development of parallel algorithms for an automatic recognition and classification of objects from an industrial line (either production or packaging) is presented. This kind of problem introduces a temporal restriction on images processing, a parallel resolution being therefore required. We have chosen simple objects (fruits, eggs, etc.), which are classified according to characteristics such as shape, color, size, defects (stains, loss of color), etc. By means of this classification, objects can be sent, for example, to different sectors of the line. Algorithms parallelization on a heterogeneous computers network with a PVM (Parallel Virtual Machine) support is studied in this paper. Finally, some quantitative results obtained from the application of the algorithm on a representative sample of real images are presented.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>The development of parallel algorithms for an automatic recognition and classification of objects from an industrial line (either production or packaging) is presented. This kind of problem introduces a temporal restriction on images processing, a parallel resolution being therefore required. We have chosen simple objects (fruits, eggs, etc.), which are classified according to characteristics such as shape, color, size, defects (stains, loss of color), etc. By means of this classification, objects can be sent, for example, to different sectors of the line. Algorithms parallelization on a heterogeneous computers network with a PVM (Parallel Virtual Machine) support is studied in this paper. Finally, some quantitative results obtained from the application of the algorithm on a representative sample of real images are presented.</dc:description>
</entry>
<entry>
<title>A parallel approach for backpropagation learning of neural networks</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9378" rel="alternate"/>
<author>
<name>Crespo, María Liz</name>
</author>
<author>
<name>Piccoli, María Fabiana</name>
</author>
<author>
<name>Printista, Alicia Marcela</name>
</author>
<author>
<name>Gallard, Raúl Hector</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9378</id>
<updated>2019-06-15T04:04:36Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Articulo
Journal of Computer Science &amp; Technology; vol. 1, no. 1
Fast response, storage efficiency, fault tolerance and graceful degradation in face of scarce or spurious inputs make neural networks appropiate tools for Intelligent Computer Systems. But on the other hand, learning algorithms for neural networks involve CPU intensive processing and consequently great effort hass been done to develop parallel implementation intended for a reduction of learning time. Looking at both sides of the coin, this paper shows firstly two alternatives to parallelise the learning process and then an apllication of neural networks to computing systems. On the parallel alternative distributed implementations to parallelise the learning process of neural networks using pattern partitioning approach. Under this approach weight changes are computed concurently, exchanged between system components and adjusted accordingly until the whole parallel learning process is completed. On the application side, some design and implementation insights to build a system where decision support for load distribution is based on a neural network device are shown. Incoming task allocation, as a previous step, is a fundamental service aiming for improving distributed system perfomance facilitating further dynamic load balancing. A neural network device inserted into the kernel of a distributed system as an intelligent dool, allows to achieve automatic allocation of execution requests under some predefinided perfomance criteria based on resource availability and incoming process requeriments. Perfomamnec results of the parallelised approach for learning of backpropagation neural networks, are shown. This include a comparison of recall and generalisation abilities to support parallelism.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>Fast response, storage efficiency, fault tolerance and graceful degradation in face of scarce or spurious inputs make neural networks appropiate tools for Intelligent Computer Systems. But on the other hand, learning algorithms for neural networks involve CPU intensive processing and consequently great effort hass been done to develop parallel implementation intended for a reduction of learning time. Looking at both sides of the coin, this paper shows firstly two alternatives to parallelise the learning process and then an apllication of neural networks to computing systems. On the parallel alternative distributed implementations to parallelise the learning process of neural networks using pattern partitioning approach. Under this approach weight changes are computed concurently, exchanged between system components and adjusted accordingly until the whole parallel learning process is completed. On the application side, some design and implementation insights to build a system where decision support for load distribution is based on a neural network device are shown. Incoming task allocation, as a previous step, is a fundamental service aiming for improving distributed system perfomance facilitating further dynamic load balancing. A neural network device inserted into the kernel of a distributed system as an intelligent dool, allows to achieve automatic allocation of execution requests under some predefinided perfomance criteria based on resource availability and incoming process requeriments. Perfomamnec results of the parallelised approach for learning of backpropagation neural networks, are shown. This include a comparison of recall and generalisation abilities to support parallelism.</dc:description>
</entry>
<entry>
<title>JPEG with quadtree adaptive partitioning: Loss analysis</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9377" rel="alternate"/>
<author>
<name>Russo, Claudia Cecilia</name>
</author>
<author>
<name>Ramón, Hugo Dionisio</name>
</author>
<author>
<name>De Giusti, Armando Eduardo</name>
</author>
<author>
<name>Flores, Raúl Alberto</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9377</id>
<updated>2019-06-15T04:04:33Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Articulo
Journal of Computer Science &amp; Technology; vol. 1, no. 1
In this paper two images compression techniques with loss based on the method used by the compression Standard Joint Photographic Experts Groups (JPEG) and on the Quadtree adaptive partitioning method are presented and compared, and the loss produced studied. The ba seline JPEG algorithm will be ana lyzed, and op timizations emphasizing quantification and not modifying the standard restrictions will be proposed. The results obtained from the generalization in classes of images with very different characteristics will be analyzed; and blocks size effect in conflicting areas such as the borders will be considered.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>In this paper two images compression techniques with loss based on the method used by the compression Standard Joint Photographic Experts Groups (JPEG) and on the Quadtree adaptive partitioning method are presented and compared, and the loss produced studied. The ba seline JPEG algorithm will be ana lyzed, and op timizations emphasizing quantification and not modifying the standard restrictions will be proposed. The results obtained from the generalization in classes of images with very different characteristics will be analyzed; and blocks size effect in conflicting areas such as the borders will be considered.</dc:description>
</entry>
<entry>
<title>Feature extraction for an image retrieving scheme</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9376" rel="alternate"/>
<author>
<name>Fuertes García, José Manuel</name>
</author>
<author>
<name>Lucena López, Manuel José</name>
</author>
<author>
<name>Pérez de la Blanca Capilla, Nicolás</name>
</author>
<author>
<name>Fernández Valdivia, Joaquín</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9376</id>
<updated>2019-06-15T04:04:32Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Articulo
Journal of Computer Science &amp; Technology; vol. 1, no. 1
In this paper we present two basic modules whithin the designed scheme for retrieving images of a database from the object colour and shape in the scenes. On the one hand, we desing a new method to detect edges in colour images. We offer a new approach to the perceptual space (H,S,I) (an Uniform Chromatic Scale space) About wich we describe its properties as well as the metric to work in it. On the other hand, we develop an information simplifying process to form a graphic structure en wich the image pixels join in similar colour areas. For this, we describe a region growing mechanism with the gradient information given by the edge detector module, together with their division module.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>In this paper we present two basic modules whithin the designed scheme for retrieving images of a database from the object colour and shape in the scenes. On the one hand, we desing a new method to detect edges in colour images. We offer a new approach to the perceptual space (H,S,I) (an Uniform Chromatic Scale space) About wich we describe its properties as well as the metric to work in it. On the other hand, we develop an information simplifying process to form a graphic structure en wich the image pixels join in similar colour areas. For this, we describe a region growing mechanism with the gradient information given by the edge detector module, together with their division module.</dc:description>
</entry>
<entry>
<title>Communion: a new strategy form memory management in high-performance computer</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9375" rel="alternate"/>
<author>
<name>Toshimi Midorikawa, Edson</name>
</author>
<author>
<name>Matsumoto Sato, Liria</name>
</author>
<author>
<name>Zuffo, João Antônio</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9375</id>
<updated>2019-06-15T04:04:31Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Articulo
Journal of Computer Science &amp; Technology; vol. 1, no. 1
Modern computers present a big gap between peak performance and sustained performance. There are many reasons for this situation, but mainly involving an inefficient usage of computational resources. Nowadays the memory system is the most critical component because of its growing inability to keep up with the processor requests. Technological trends have produced a large and growing gap between CPU speeds and DRAM speeds. Much research has focused this memory system problem, including program optimizing techniques, data locality enhancement, hardware and software prefetching, decoupled architectures, multithreading, speculative loads and execution. These techniques have got a relative success, but they focus only one component in the hardware or software systems. We present here a new strategy for memory management in high-performance computer systems, named COMMUNION. The basic idea behind this strategy is "cooperation". We introduce some interaction possibilities among system programs that are responsible to generate and execute application programs. So, we investigate two specific interactions: between the compiler and the operating system, and among the compiling system components. The experimental results show that it's possible to get improvements of about 10 times in execution time, and about 5 times in memory demand, enhancing the interaction between the compiling system components. In the interaction between compiler and operating system, named Compiler-Aided Page Replacement (CAPR), we achieved a reduction of about 10% in space-time product, with an increase of only 0.5% in the total execution time. All these results show that it s possible to manage main memory with a better efficiency than current systems.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>Modern computers present a big gap between peak performance and sustained performance. There are many reasons for this situation, but mainly involving an inefficient usage of computational resources. Nowadays the memory system is the most critical component because of its growing inability to keep up with the processor requests. Technological trends have produced a large and growing gap between CPU speeds and DRAM speeds. Much research has focused this memory system problem, including program optimizing techniques, data locality enhancement, hardware and software prefetching, decoupled architectures, multithreading, speculative loads and execution. These techniques have got a relative success, but they focus only one component in the hardware or software systems. We present here a new strategy for memory management in high-performance computer systems, named COMMUNION. The basic idea behind this strategy is "cooperation". We introduce some interaction possibilities among system programs that are responsible to generate and execute application programs. So, we investigate two specific interactions: between the compiler and the operating system, and among the compiling system components. The experimental results show that it's possible to get improvements of about 10 times in execution time, and about 5 times in memory demand, enhancing the interaction between the compiling system components. In the interaction between compiler and operating system, named Compiler-Aided Page Replacement (CAPR), we achieved a reduction of about 10% in space-time product, with an increase of only 0.5% in the total execution time. All these results show that it s possible to manage main memory with a better efficiency than current systems.</dc:description>
</entry>
<entry>
<title>A high performance core for OSI management agents: implementation, simulation and performance evaluation</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9374" rel="alternate"/>
<author>
<name>Rivalino, Matias Júnior</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9374</id>
<updated>2019-06-15T04:04:30Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Articulo
Journal of Computer Science &amp; Technology; vol. 1, no. 1
This article presents a proposal of a multithreaded core for an OSI/ISO management agents including its modeling, simulation and performance evaluation. The proposed model i s compared against another one (unthreaded core) which is the commonly adopted model by the most of the network management systems. All the modeling and simulation process were done at the a gent core level. Therefore the performance evaluation do not consider any effect of the communication layers, dealing with the performance of the activities related to the core of the agents applications.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>This article presents a proposal of a multithreaded core for an OSI/ISO management agents including its modeling, simulation and performance evaluation. The proposed model i s compared against another one (unthreaded core) which is the commonly adopted model by the most of the network management systems. All the modeling and simulation process were done at the a gent core level. Therefore the performance evaluation do not consider any effect of the communication layers, dealing with the performance of the activities related to the core of the agents applications.</dc:description>
</entry>
<entry>
<title>Preserving message integrity in dynamic process migration</title>
<link href="http://sedici.unlp.edu.ar:80/handle/10915/9373" rel="alternate"/>
<author>
<name>Heymann, Elisa</name>
</author>
<author>
<name>Tinetti, Fernando Gustavo</name>
</author>
<author>
<name>Luque Fadón, Emilio</name>
</author>
<id>http://sedici.unlp.edu.ar:80/handle/10915/9373</id>
<updated>2019-06-15T04:04:27Z</updated>
<published>1999-03-01T00:00:00Z</published>
<summary type="text">Articulo
Journal of Computer Science &amp; Technology; vol. 1, no. 1
Processor and network management have a great impact on the performance of Distributed Memory Parallel Computers. Dynamic Process Migration allows load balancing and communication balancing at execution time. Managing the communications involving the migrating process is one of the problems that Dynamic Process Migration implies. To study this problem, which we have called the Message Integrity Problem, six algorithms have been analysed. These algorithms have been studied by sequential simulation, and have also been implemented in a parallel machine for different user process patterns in the presence of dynamic migration. To compare the algorithms, different performance parameters have been considered. The results obtained have given preliminary information about the algorithms behaviour, and have allowed us to perform an initial comparative evaluation among them.
</summary>
<dc:date>1999-03-01T00:00:00Z</dc:date>
<dc:description>Processor and network management have a great impact on the performance of Distributed Memory Parallel Computers. Dynamic Process Migration allows load balancing and communication balancing at execution time. Managing the communications involving the migrating process is one of the problems that Dynamic Process Migration implies. To study this problem, which we have called the Message Integrity Problem, six algorithms have been analysed. These algorithms have been studied by sequential simulation, and have also been implemented in a parallel machine for different user process patterns in the presence of dynamic migration. To compare the algorithms, different performance parameters have been considered. The results obtained have given preliminary information about the algorithms behaviour, and have allowed us to perform an initial comparative evaluation among them.</dc:description>
</entry>
</feed>
