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dc.date.accessioned 2025-09-29T14:58:01Z
dc.date.available 2025-09-29T14:58:01Z
dc.date.issued 2003
dc.identifier.uri http://sedici.unlp.edu.ar/handle/10915/185211
dc.description.abstract A design and development tool to achieve artificial neural networks (ANN) implemented in a Field Programmable Gate Array (FPGA), is presented in this article. Its main components and functionality are thoroughly described. This tool, called NNGen, allows constructing digital ANN, which are easily programmable selecting different parameters. The output of such programming task is directly VHDL code to be ported to, in principle, any chip of the mentioned kind. A case study of a multilayer perceptron applied to weather forecast that was fully designed with NNGen, is also analyzed to obtain some conclusions. en
dc.language en es
dc.subject Artificial Neural Networks es
dc.subject FPGA es
dc.subject NNGen es
dc.title NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip en
dc.type Objeto de conferencia es
sedici.identifier.issn 1666-1079 es
sedici.creator.person Tosini, Marcelo Alejandro es
sedici.subject.materias Ciencias Informáticas es
sedici.description.fulltext true es
mods.originInfo.place Sociedad Argentina de Informática e Investigación Operativa es
sedici.subtype Objeto de conferencia es
sedici.rights.license Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)
sedici.rights.uri http://creativecommons.org/licenses/by-nc-sa/4.0/
sedici.date.exposure 2003-09
sedici.relation.event Simposio Argentino de Inteligencia Artificial (ASAI 2003)- JAIIO 32 (CABA, 1 al 5 de septiembre de 2003) es
sedici.description.peerReview peer-review es


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Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0) Except where otherwise noted, this item's license is described as Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)