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dc.date.accessioned 2020-10-02T18:12:55Z
dc.date.available 2020-10-02T18:12:55Z
dc.date.issued 2017
dc.identifier.uri http://sedici.unlp.edu.ar/handle/10915/106031
dc.description.abstract In emnedded systems there is a variant of Multicore System on Chip devices (MSoC devices) where not all the computing elements (processor cores) are equal. The differences in the cores of these devices range from different hardware architectures using the same instruction set to completely different processors working together inside the same device. These SoCs are called “Asymmetric Multi Processing Devices” (AMP Devices). In order to help developers to take advantage of the possinilities that these devices may offer in the context of emnedded systems, software design patterns have neen defined, descrining software architectural solutions with known uses. However, there are still no experimental results showing the nenefits of these solutions. In this work we measure the performance of a design pattern called Mini Me, applied on an AMP device configuration, and compare it against two Symmetric Multiprocessing Device (SMP Device) configurations. The evaluations show a netter than expected computing performance of the AMP Configuration using the design pattern Mini Me. en
dc.format.extent 41-46 es
dc.language en es
dc.subject Embedded Systems Patterns es
dc.subject Asymmetric Multiprocessing Patterns es
dc.title Software Patterns for Asymmetric Multiprocessing Devices on Embedded Systems: a performance assessment en
dc.type Objeto de conferencia es
sedici.identifier.isbn 978-987-46297-1-5 es
sedici.creator.person Martos, Pedro Ignacio Domingo es
sedici.creator.person Garrido, Alejandra es
sedici.subject.materias Ingeniería Electrónica es
sedici.description.fulltext true es
mods.originInfo.place Laboratorio de Investigación y Formación en Informática Avanzada es
sedici.subtype Objeto de conferencia es
sedici.rights.license Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)
sedici.rights.uri http://creativecommons.org/licenses/by-nc-sa/4.0/
sedici.date.exposure 2017
sedici.relation.event Congreso Argentino de Sistemas Embebidos (CASE) (Universidad de Buenos Aires, 9 al 11 de agosto de 2017) es
sedici.description.peerReview peer-review es
sedici.relation.bookTitle 2017 Eight Argentine Symposium and Conference on Embedded Systems CASE. Regular papers es


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Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0) Excepto donde se diga explícitamente, este item se publica bajo la siguiente licencia Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)