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dc.date.accessioned 2012-09-20T11:13:51Z
dc.date.available 2012-09-20T11:13:51Z
dc.date.issued 2009
dc.identifier.uri http://sedici.unlp.edu.ar/handle/10915/21209
dc.description.abstract This paper presents a parallel architecture for a radial basis function (RBF) neural network used for pattern recognition. This architecture allows defining sub-networks which can be activated sequentially. It can be used as a fruitful classification mechanism in many application fields. Several implementations of the network on a Xilinx FPGA Virtex 4 - (xc4vsx25) are presented, with speed and area evaluation metrics. Some network improvements have been achieved by segmenting the critical path. The results expressed in terms of speed and area are satisfactory and have been applied to pattern recognition problems. en
dc.format.extent 1071-1080 es
dc.language en es
dc.subject Self-modifying machines (e.g., neural networks) es
dc.subject Patterns es
dc.subject Parallel Architectures es
dc.title RBF neural network implementation in hardware en
dc.type Objeto de conferencia es
sedici.creator.person Leiva, Lucas es
sedici.creator.person Acosta, Nelson es
sedici.description.note IV Workshop Arquitectura, Redes y Sistemas Operativos (WARSO) es
sedici.subject.materias Ciencias Informáticas es
sedici.description.fulltext true es
mods.originInfo.place Red de Universidades con Carreras en Informática (RedUNCI) es
sedici.subtype Objeto de conferencia es
sedici.rights.license Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)
sedici.rights.uri http://creativecommons.org/licenses/by-nc-sa/2.5/ar/
sedici.date.exposure 2009-10
sedici.relation.event XV Congreso Argentino de Ciencias de la Computación es
sedici.description.peerReview peer-review es


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Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5) Excepto donde se diga explícitamente, este item se publica bajo la siguiente licencia Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)