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dc.date.accessioned | 2012-11-05T18:48:55Z | |
dc.date.available | 2012-11-05T18:48:55Z | |
dc.date.issued | 2000-10 | |
dc.identifier.uri | http://sedici.unlp.edu.ar/handle/10915/23679 | |
dc.description.abstract | The coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm. | es |
dc.language | en | es |
dc.subject | Architectures | es |
dc.subject | Computer arithmetic | es |
dc.subject | Algorithms | es |
dc.subject | Hardware | es |
dc.subject | Signal processing | es |
dc.title | A fast CORDIC co-processor architecture for digital signal processing applications | en |
dc.type | Objeto de conferencia | es |
sedici.creator.person | Giacomantone, Javier | es |
sedici.creator.person | Villagarcía Wanza, Horacio A. | es |
sedici.creator.person | Bria, Oscar N. | es |
sedici.description.note | Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de Procesadores | es |
sedici.subject.materias | Ciencias Informáticas | es |
sedici.description.fulltext | true | es |
mods.originInfo.place | Red de Universidades con Carreras en Informática (RedUNCI) | es |
sedici.subtype | Objeto de conferencia | es |
sedici.rights.license | Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5) | |
sedici.rights.uri | http://creativecommons.org/licenses/by-nc-sa/2.5/ar/ | |
sedici.date.exposure | 2000-10 | |
sedici.relation.event | VI Congreso Argentino de Ciencias de la Computación | es |
sedici.description.peerReview | peer-review | es |