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dc.date.accessioned 2008-05-20T19:13:05Z
dc.date.available 2008-05-20T03:00:00Z
dc.date.issued 2006-04
dc.identifier.uri http://sedici.unlp.edu.ar/handle/10915/9514
dc.description.abstract This paper describes how to design low-cost reliable computing software for various application systems, by incorporating a single-version fault tolerant scheme along with run-time signature-based control-flow checking. Most of the ordinary systems lack fault tolerant software fix. The conventional fault tolerant approaches viz., Recovery Block (RB), N Version Programming (NVP) etc., are too costly to fix in an ordinary low-cost application system because, both the RB and NVP rely on multiple (at least three) versions of both software and computing machines. However, the proposed approach needs a single version (SV) of an enhanced application program that gets executed on one computing machine only. It is common that we often face interrupted service (caused either by an intermittent fault in an application program or in hardware), during the service delivery period of an ordinary cheaper application system. Execution of an application program often show malfunctions or it gets interrupted due to memory bit errors. Error Correction Codes (ECC) (viz., parity, Hamming codes, CRC etc.,) that are used in memory, are not as effective for online correction of multiple bit errors, as they are, for the detection of few bit errors. Again, software implemented ECC has a significant overhead over both time and code redundancy. In other words, built in ECC in memory, cannot recover all bit errors but can detect only. As a result, if an error is detected by ECC, the application program needs to be restarted for its re-execution afresh in various microprocessor based application systems. So, the ECC alone is useful for designing a fail-stop kind of system but it suffers from high time redundancy. Other software implemented fault- tolerance schemes are also towards fail-stop kind. But, the proposed (SV) based approach is capable of tolerating such errors without stopping the execution of an application. This SV Scheme (SVS) aims to provide an uninterrupted service at no extra money, but at an acceptable more execution time and memory space. This SV is a non- fail-stop kind fault tolerance scheme that can be implemented in various computing systems without spending an additional money, and as a result, major part of common people in our society, can gain reliable service from the low-cost, SV-based computing system. en
dc.format.extent 22-27 es
dc.language en es
dc.subject bit errors in memory and register en
dc.subject Fault tolerance es
dc.title A single-version scheme of fault tolerant computing en
dc.type Articulo es
sedici.identifier.uri http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Apr06-4.pdf es
sedici.identifier.issn 1666-6038 es
sedici.creator.person Saha, Goutan Kumar es
sedici.subject.materias Ciencias Informáticas es
sedici.description.fulltext true es
mods.originInfo.place Facultad de Informática es
sedici.subtype Articulo es
sedici.rights.license Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)
sedici.rights.uri http://creativecommons.org/licenses/by-nc/3.0/
sedici.description.peerReview peer-review es
sedici2003.identifier ARG-UNLP-ART-0000000554 es
sedici.relation.journalTitle Journal of Computer Science & Technology es
sedici.relation.journalVolumeAndIssue vol. 6, no. 1 es


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Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0) Excepto donde se diga explícitamente, este item se publica bajo la siguiente licencia Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)