A Low Complexity Sum-Subtract Decoding Algorithm for Non-Binary LDPC Codes over GF(q)

Abstract

In this paper, we present a low complexity Sum-Subtract decoder for non-binary LDPC codes defined over GF(q). The performance of this decoding algorithm is similar to that of the Fast Fourier Transform Sum-Product algorithm usually utilized for decoding non-binary LDPC codes. It is a simplified algorithm that can be easily implemented on programmable logic technology such as FPGA devices because of its use of only additions and subtractions, avoiding the use of quotients and products, and of float point arithmetic. The algorithm yields a very low complexity programmable logic implementation of an NB-LDPC decoder with an excellent BER performance.